Application-specific integrated circuits (ASICs) often include components such as an embedded microprocessor and an internal random access memory (RAM). Multifunction controllers are one type of ASIC commonly used to provide functions such as input/output control and power management in computers and other electronic systems. A typical multifunction controller may utilize an embedded microprocessor and internal RAM to direct the operation of several independent input/output device controllers such as a floppy disk controller, one or more serial port controllers, a parallel port controller, and a keyboard/mouse interface controller. The embedded microprocessor provides power management functions for the system in which the multifunction controller is installed by monitoring the activity of the keyboard, mouse and other system elements using well-known interrupt processing techniques. The embedded microprocessor can shut down a main system power supply if no activity is detected for a predetermined time period, thereby placing the system in a standby or "sleep" mode of operation. A standby power supply is typically provided to supply power to the embedded microprocessor and other standby logic circuitry so that the system can be directed to exit sleep mode in response to a wake-up event such as a keyboard entry or mouse click.
The above-described multifunction controller generally requires some amount of internal code storage so that shutting down the main system supply does not completely prevent the embedded microprocessor from executing code. This internal code storage may be implemented in the form of read-only memory (ROM), which generally provides more code storage capacity for a given amount of chip area than other available memory types. However, a ROM-based code storage implementation usually requires that the code be programmed into memory at the time of chip fabrication, and it is relatively difficult to update or otherwise modify the code at a later date. An internal code storage technique which avoids these modification difficulties involves storing the code in the internal RAM of the multifunction controller. The stored code can then be updated or otherwise modified at any time. In such an implementation, chip area limitations often dictate that the minimum required amount of RAM be included within the multifunction controller, while the balance of the code storage is provided by an external memory device. The external memory device could be any type of memory device, including a non-volatile memory device such as a flash EPROM.
The external memory device may be shared by the embedded microprocessor and other system elements such as a host central processing unit (CPU). The code stored in the external memory device may therefore be unavailable to the embedded microprocessor when the host CPU is accessing the external memory device. In order to continue operating when the externally-stored code is unavailable, the embedded microprocessor must be able to execute code stored in the internal RAM. It is thus very important to ensure that the embedded microprocessor has adequate access to both internal and external code storage memory. Failure to provide adequate access can result in an undesirable interruption of the input/output control, power management and other functions of the embedded microprocessor. The problem of inadequate access to internal and external code storage may be particularly acute during certain phases of operation such as system initialization. For example, the external memory may include BIOS code or other code required by the host CPU soon after an initialization, and the internal code storage required by the embedded microprocessor may be dependent upon an initial loading of code from the external memory device. If the initial loading is prevented due to an inability to access the external memory device, the embedded microprocessor may be left with no internal code to execute. As noted previously, this can present a serious problem in the event of a main power supply shutdown. Unfortunately, prior art code storage techniques fail to provide adequate assurance that the host CPU or another system element will not prevent the embedded microprocessor from accessing the external memory device at or soon after a system initialization, as well as during other phases of system operation.
As is apparent from the above, there is a need for improved code storage techniques suitable for use in multifunction controllers as well as other microprocessor-based integrated circuits.